%META:TOPICINFO{author="ChrisBartram" date="1170377924" format="1.1" version="1.2"}%
%META:TOPICPARENT{name="Hp3000Hardware"}%
---+ HP3000 Model names and numbers

<pre>
      3x         = any Classic HP3000 in the 30 series (30, 33, 37)
      30         = code named Koala
      37         = code named Mighty Mouse
      Micro/3000 = series 37 with microcode on chip, other enhancements
      4x         = (40,42,44,48)
      40         = code named Cub
      44         = code named Grizzly
      5x         = (52,58)
      64A/B      = code named Gemini
      68A/B      = 64 with two I/O bays
      70A/B      = 64/68 with bigger cache (highest end classic 3000)
                   (*B models had newer/improved power supplies)
      9xx        = any HP3000 in the 900 series.
      922        = code named Silverfox (Low)
      932        = code named Silverfox (High)
      925        = code named Firefox
      930        = code named Indigo
      935        = code named Topgun
      9x7        = Nova series boxes
      948        = code named Silver Bullet -L
      958        = code named Silver Bullet -H
      949        = code named Shogun
      950        = code named Cheetah
      955        = code named Jaguar (also: PN10)
      960        = code named Cougar (also: PN10C)
      980        = code named Panther
      918,928,   = (successor of 9x7 boxes) code named "Wright Brothers"
      968,978
      99x        = Emerald series boxes (multi processor options)
      A-Series   = (aka A-Class)
      N-Series   = (aka N-Class)
</pre>

BTW, I hear somewhere that the very first Spectrum was implemented in a S/48 cabinet. 

 --[[EvanRudderow]]

You are correct. The Grizzly processor on an S/48 was micro coded to implement the Spectrum instruction set. It was called the LESS machine. I don't know what the acronym meant, but remember that less is more. 

 --[[RickEhrhart]]

Some information on differences between processors: 

<pre>
S/40 - S/42  --- added disc caching, implemented in software.
S/44 - S/48   /

S/42 - S/52  --- Memory controller update to support 2 and 4 MB memory
S/48 - S/58   /   boards. Also, updated CPU to support various
                  system table expansions and slight processor speed
                  enhancement.

S/64 - S/68  --- Added support of a 3rd I/O bay.

S/68 - S/70  --- Increased CPU (not disc) Cache for a rather
                  significant increase in CPU speed.
</pre>

There were a couple of other things that differentiated the S/64A and S/68A from the S/64B, S/68B, and S/70. Most notable were a different SSDP (System Status and Display Panel) and a totally different power supply and distribution group. 

 --[[PeteCrosby]]

(As I remember) the offerings at the time were 40, 44, and 64. The 40 and 44 were essentially the same horsepower and had interchangeable boards, but the 40 was a square-ish box with no terminal connections (other than console); the ADCCs ran out to little metal boxes or your ATP came to a mini-cabinet. The 44 was the "desk" looking thing, the 64 was the "chest freezer". 

MPE V started the cache business and had V/P initially (cache only), V/E (new processor and firmware for CST tricks), and later V/R (for the obsolete Series III and below). V/P was purely software, but you had to "upgrade" from 40-42, 44-48, or 64-68 to get it; consequently if you got the upgrade early (before the firmware was released) and deleted the memory board, all you got was a new FOS/SUBSYS tape and a new nameplate (for a considerable chunk of money). I know, I got two of them :-) Of course you later got the firmware (and V/E). 

The next processor speed-up changed 42-52, 48-58 (for sure) and I think also 68-70. I've had a 40/42/44/48/52/58, dunno about the rest :-) 

 --[[JeffKell]]

Yes, 68-70 added CPU/microcode caching. We went through a few of those upgrades ourselves. 

-- Main.ChrisBartram - 17 May 2006